diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 284d1de..f130fa7 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -469,6 +469,8 @@ static void mce_report_event(struct pt_regs *regs) DEFINE_PER_CPU(unsigned, mce_poll_count); +#define D printk("[%d] %s:%d\n", smp_processor_id(), __FILE__, __LINE__) + /* * Poll for corrected events or events that happened before reset. * Those are just logged through /dev/mcelog. @@ -489,12 +491,21 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b) struct mce m; int i; + + printk("mcp on cpu %d flags %x banks %lx\n", smp_processor_id(), + flags, *b); + __get_cpu_var(mce_poll_count)++; mce_setup(&m); + D; + m.mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS); + + D; for (i = 0; i < banks; i++) { + printk("bank %d\n", i); if (!bank[i] || !test_bit(i, *b)) continue; @@ -504,10 +515,12 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b) m.tsc = 0; barrier(); + D; m.status = mce_rdmsrl(MSR_IA32_MC0_STATUS + i*4); if (!(m.status & MCI_STATUS_VAL)) continue; + D; /* * Uncorrected or signalled events are handled by the exception * handler when it is enabled, so don't process those here. @@ -518,11 +531,14 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b) (m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC))) continue; + D; if (m.status & MCI_STATUS_MISCV) m.misc = mce_rdmsrl(MSR_IA32_MC0_MISC + i*4); if (m.status & MCI_STATUS_ADDRV) m.addr = mce_rdmsrl(MSR_IA32_MC0_ADDR + i*4); + D; + if (!(flags & MCP_TIMESTAMP)) m.tsc = 0; /* @@ -534,6 +550,8 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b) add_taint(TAINT_MACHINE_CHECK); } + D; + /* * Clear state for this bank. */ @@ -546,6 +564,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b) */ sync_core(); + printk("mcp on cpu %d finished\n", smp_processor_id()); } EXPORT_SYMBOL_GPL(machine_check_poll);